Acceleration System for Single-Precision Floating-Point Arithmetic Based on IEEE754 Standard

In recent literature, there has been a heightened interest in the algorithms underpinning artificial intelligence. The crux of this research is the integration of these algorithms into embedded systems. Fundamental to these algorithms are arithmetic operations such as addition and multiplication. This study introduces an implementation of single-precision floating-point arithmetic in compliance with the IEEE754 standard. Adopting a modular approach, the system is deconstructed into distinct modules for addition, subtraction, multiplication, and division, each with its own unique implementation. Within an individual module, components such as sign, exponent, and mantissa are distinctly treated. Delving into the mathematical intricacies of the exponent and mantissa allows for the formulation of the subsequent programming. This study proposes a rounding operation to facilitate diverse rounding modes for the data. Advanced techniques such as the over-advancing adder and Zero judgement are employed to enhance the adder's speed, and constructs like Overflow and Error are introduced to evaluate the output data's status in adherence to the IEEE754 standard. Functional tests of the modules were conducted on a designated platform. A timing simulation was performed using ModelSim, corroborating the robust performance of the proposed system.