In this article, the author proposed an analog multiplier/divider circuit using dual-X second-generation current conveyor (DXCCII). A proposed multiplier/divider circuit employing two active blocks, namely DXCCII and four MOSFETs. The proposed circuit can function as both a voltage-mode four-quadrant analog multiplier and a two-quadrant analog divider by controlling the biasing voltages. Moreover, the circuit’s output is found to be independent of the device parameters. The proposed circuit does not employ any passive components suitable for monolithic integration and requires less chip area. The comparisons of the proposed circuit with available literature are also included. The workability of the proposed circuit in performing various functions has been verified through LTspice simulations using the CMOS-based DXCCII architecture with 0.18 𝜇m TSMC CMOS technology parameters. The simulation results of the proposed circuits are also included to justify the claimed function. The proposed circuit simulated -3dB bandwidth found as 51.84MHz and power consumption is 0.621𝜇W. Moreover, the performance of the analog multiplier is verified through various applications, including a squarer, an amplitude modulator, and a frequency doubler. Also, to illustrate the analog divider operation, the circuit is analyzed to operate as an inverse function.
Mohan et al. (Wed,) studied this question.