Machine Learning-Driven Prediction of Optimal Design Parameters for Ripple Carry Adder

Adder circuits are fundamental building blocks in digital electronics and computing systems with applications in basic arithmetic operations to complex computational tasks. Their performance is often limited by propagation delay, area, and power trade-offs. This paper focuses on exploring a machine learning (ML) driven multi-target regression approach for optimizing key design parameters of adders, specifically a ripple carry adder (RCA). Using artificial intelligence (AI) methodologies for automated very large scale integration (VLSI) design optimization will contribute to saving design time for energy efficient sustainable innovations to widen the horizons of computing and communication technologies in the observable future. A dataset containing 8000 datapoints for delay and power consumption of RCA design with different transistor sizes and supply voltages is generated using simulation program with integrated circuit emphasis (SPICE) circuit simulation at 32nm technology node. Multi-target based regression is then used to predict optimal device dimensions and supply voltage, for delay and power constraints. Experimental results demonstrate R2 score of 0.984, root mean square error (RMSE) of 20.96 and a mean square error (MAE) of 11.37 between the predicted and actual design parameters. This approach provides efficient parameter exploration for optimized and efficient design and operation of digital and analog circuits with different features.