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Learning-driven identification of fault-relevant test patterns for cost-efficient VLSI testing | Synapse
March 3, 2026
Learning-driven identification of fault-relevant test patterns for cost-efficient VLSI testing
YL
Yamei Liu
ZL
Zhinan Li
WZ
Weijing Zhao
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Key Points
Identifying fault-relevant test patterns enhances cost-efficiency in VLSI testing, streamlining testing processes.
Machine learning algorithms assist in determining the most effective test metrics for fault detection during VLSI testing.
This analysis uses an innovative approach to enhance VLSI testing by integrating data-driven insights into the testing framework.
Highlighting the benefits of fault-relevant patterns indicates potential improvements in testing efficiency and accuracy.
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Liu et al. (Fri,) studied this question.
synapsesocial.com/papers/69a768b0badf0bb9e87e59bd
https://doi.org/https://doi.org/10.1016/j.mejo.2026.107091