ABSTRACT With the NIST standardization of post‐quantum cryptography (PQC), lightweight PQC for IoT and edge computing has become a hot topic. The ring‐binary‐learning‐with‐error‐based encryption (RBLWE‐ENC) scheme is a promising candidate. However, it cannot use fast algorithms like the number theoretic transform (NTT) due to its parameter settings. To address this, we present a high‐performance hardware accelerator using the Toom–Cook algorithm. Specifically, we reformulated the polynomial multiplication (PM) using the Toom–Cook algorithm and designed a dedicated hardware architecture. To further increase speed, we integrated multiplexers (MUXes) to create a core computation unit that supports parallel polynomial addition (PA), significantly reducing overall execution time. Through extensive complexity analysis, we verified the efficiency of our design. Results show that our accelerator achieves 2.4× higher throughput and a 0.78× reduction in area‐delay product (ADP) compared to the state‐of‐the‐art. The findings of this work are expected to serve as a useful reference for the ongoing development of lightweight PQC solutions.
Zhao et al. (Wed,) studied this question.