Wideband terahertz (THz) massive multiple-input multiple-output (MIMO) promises extremely high data rates, but large fractional bandwidth and large arrays cause beam squint/beam split, leading to severe spectral-efficiency loss with conventional phase-shifter-only hybrid precoding. Delay–phase (true-time-delay plus phase-shifter) precoding mitigates beam split, yet existing designs often provision the delay-network granularity for full-angle coverage, resulting in unnecessary hardware and power consumption in practical sectorized deployments. This paper develops a sector-aware delay–phase precoding (SA-DPP) framework for wideband THz massive MIMO with reconfigurable intelligent surface (RIS) assistance. We first derive a sector-conditioned sufficient condition that links the required number of true-time-delay (TTD) elements per RF chain to the supported angular sector and system bandwidth, and we select the smallest feasible delay-network granularity. Given this hardware dimensioning, we construct the wideband analog beamformer in closed form and design the per-subcarrier digital precoder; for RIS-assisted links, we also configure the RIS phases using a geometry-based initialization followed by a low-complexity alternating optimization. Simulation results for RIS-assisted links show that SA-DPP achieves near-optimal wideband rate close to a TTD-based baseline while using fewer delay elements and improving energy efficiency in sector-limited channels. To address the propagation-regime concern for electrically large THz arrays, we also evaluate the original far-field-based DPP/SA-DPP designs on a spherical-wave channel generator and show that, although the representative short-range link lies in the radiating near field, the resulting rate loss remains modest. We further quantify the impact of RIS size under an aperture-scaling model and show that larger RISs improve the wideband data rate with diminishing gains due to frequency-flat RIS phase constraints. We also evaluate quantized RIS phase shifts in wideband operation and demonstrate that a small number of phase bits (e.g., 3–4 bits) suffices to approach continuous-phase performance.
Albataineh et al. (Thu,) studied this question.