Enhancing the robustness and fault tolerance of finite-state machines (FSMs) is crucial for safety-critical systems, such as transportation control systems and medical equipment. This issue becomes particularly important when developing control units for unmanned aerial vehicles (UAVs), which are exposed to external disturbances from electronic warfare (EW) systems. Under such conditions, traditional methods for creating fault-tolerant finite-state machines (FTFSMs), initially designed to address the effects of ionizing radiation that cause rare single-event upsets (SEUs), are often ineffective. This paper proposes a novel method for developing FTFSMs that can withstand multi-bit upsets (MBUs) affecting the FSM’s wires and memory cells due to external disturbances. The FTFSM architecture additionally includes an output register and a concurrent error detection (CED) circuit. When a fault is detected, the FTFSM switches to standby mode. Once the external disturbance ceases, the FTFSM resumes normal operation from the point of interruption without altering the control algorithm. In cases of critical errors, the FSM circuit can be reconfigured via the system processor. Experimental studies have shown that the proposed approach incurs exceptionally low overhead costs. Additionally, the paper presents a technique for calculating the probability of fault detection for FTFSMs implemented in field-programmable gate arrays (FPGAs).
Valery Salauyou (Fri,) studied this question.