February 1, 2007

A 16Gb/s Source-Series Terminated Transmitter in 65nm CMOS SOI

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Abstract

A half-rate source-series terminated TX, operating at data-rates up to 16Gb/s, targets chip-to-chip on-board interconnects. The TX features a 4-tap FFE, tunable termination, and clock-cleanup circuitry for low duty-cycle distortion, and is capable of driving loads referenced to a variable termination voltage, including Gnd, V DD , and V DD /2. Implemented in 65nm SOI, it occupies an area of 230 times 56mum 2 and draws 57.5mA from a 1V supply at 16Gb/s.

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Menolfi et al. (Thu,) studied this question.

synapsesocial.com/papers/6a1031c74fb650da4fff135d https://doi.org/https://doi.org/10.1109/isscc.2007.373486

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