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This paper compares nine network interconnection schemes and introduces "dual-bus hypercubes," a cost-effective method of connecting thousands of dual-port single-chip microcomputers into a room-sized information processing system, a "network computer." Each network node is a chip containing memory and a pair of processors for tasks and input/output. Nodes are linked by shared communication buses, each conceptually spanning a D-dimensional, W-wide hypercube of N = WD nodes. Each node shares two buses. Each bus is shared by up to W nodes. The number of bus connections per node is fixed to satisfy chip pin limitations.
Wittie (Wed,) studied this question.