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Embedded systems are experiencing an increasing demand for computational power. A commonly adopted solution to meet this demand involves deploying both critical and non-critical tasks on a single multicore processor. Nevertheless, the intricacy of such processors induces nondeterminism, posing potential risks to the dependability of the system. This becomes particularly pertinent in safety-critical real-time applications where temporal faults could lead to missed deadlines for high-criticality tasks. Emerging technologies like Intel's Cache Allocation Technology (CAT) are designed to diminish the nondeterminism instigated by shared cache memory in multicore systems, by enabling dynamic cache memory allocation. In this paper, we introduce an experimental methodology to gauge the efficacy of such technology in a real-time setting. We investigate the possibility of leveraging dynamic cache memory allocation to ensure high-criticality tasks meet their deadlines while optimizing the performance of non-critical tasks. Our proposed methodology involves an exhaustive analysis of the trade-offs between various parameters in a mixed-criticality application. The effectiveness of this approach is substantiated through a sensitivity analysis on a practical use case.
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Aléxis Génèrès
Centre National de la Recherche Scientifique
Michael S. Lauer
Rutgers, The State University of New Jersey
Jean-Charles Fabre
Centre National de la Recherche Scientifique
Centre National de la Recherche Scientifique
Université Toulouse III - Paul Sabatier
Université Fédérale de Toulouse Midi-Pyrénées
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Génèrès et al. (Mon,) studied this question.
synapsesocial.com/papers/68e700f4b6db64358767b698 — DOI: https://doi.org/10.1109/edcc61798.2024.00033
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