High-density aligned carbon nanotubes (A-CNTs), with ultrahigh carrier mobility and atomically thin bodies, hold great promise for next-generation field-effect transistors (FETs), offering significant potential for high speed and energy efficiency. These unique properties position A-CNTs as a leading candidate for future very-large-scale integration technologies in the post-Moore era. However, fabricated short-channel A-CNT transistors suffer from significant off-state degradation, falling short of the requirements for sub-1 nm node technology. The underlying mechanisms for performance degradation in aligned carbon nanotube transistors are poorly understood. This study reveals that stacking in A-CNTs induces significant bandgap narrowing (BGN) in conventional single-gate transistor configurations. This effect compromises the inherent quasi-one-dimensional electrostatic advantages of A-CNTs. We propose an efficient dual-gate architecture to resist BGN and enable subthreshold swing in A-CNT transistors to reach the Boltzmann thermionic limit of 60 mV/decade, while achieving an on/off current ratio exceeding 106. Additionally, our fabricated 10 nm ultrashort-gate A-CNT DG-FETs exhibit high performance, including a saturation current exceeding 1.8 mA/μm, a peak transconductance of 2.1 mS/μm, and low static power consumption of 10 nW/μm. DG A-CNT FETs exhibit performance merits that meet the requirements of state-of-the-art integrated circuits.
Lv et al. (Mon,) studied this question.
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