Probabilistic computing with p-bits is emerging as a computational paradigm for machine learning and for facing combinatorial optimization problems (COPs) with the so-called probabilistic Ising machines (PIMs). From a hardware point of view, the key elements that characterize a PIM are the random number generation, the nonlinearity, the network of coupled probabilistic bits, and the energy-minimization algorithm. Regarding the energy-minimization algorithm in this work we show that PIMs using the simulated quantum annealing (SQA) schedule exhibit better performance as compared to simulated annealing and parallel tempering in solving a number of COPs, such as maximum satisfiability problems, the planted Ising problem, and the traveling salesman problem. Additionally, we design and simulate the architecture of a fully connected CMOS-based PIM that is able to run the SQA algorithm having a spin-update time of 8 ns with a power consumption of 0.22 mW. Our results also show that SQA increases the reliability and the scalability of PIMs by compensating for device variability at an algorithmic level enabling the development of their implementation combining CMOS with different technologies such as spintronics. This work shows that the characteristics of the SQA are hardware agnostic and can be applied in the codesign of any hybrid analog-digital Ising machine implementation. Our results open a promising direction for the implementation of a new generation of reliable and scalable PIMs.
Raimondo et al. (Wed,) studied this question.