Threshold switching memristor modelling for spiking neuron design

Spiking neurons, an essential building block in neuromorphic computing for encoding the input signals into spikes, require device advances and circuit designs for the realization. Recent studies show that the threshold switching memristors (TSMs) can enable spiking neurons with simple circuits and efficient data processing. Herein, we study and model the switching behavior of TSMs using the standardized Verilog-A language. The model facilitates Leaky Integrate-and-Fire (LIF) neuron design on Cadence Virtuoso, notably, without the need for peripheral threshold spiking or resetting circuits. The neuron successfully performs input signal integration in both digital and analog forms for spike generation. Given the versability of the model, the study is expected to advance spiking neuron designs towards VLSI neuron circuits for neuromorphic computing.