Comprehensive Analysis of a Low-Pass-Filter Based Double Sine Phase-Locked Loop for Three-Phase Grid

A novel low-pass-filter based double sine phase-locked loop (PLL) is proposed in this article. The bandwidth would not affected by the grid-connected voltage for normalizing the output of phase discriminator by the interaction of the d-axis and q-axis voltages. On the other hand, considering the poor filtering performance of the conventional PLL, a low-pass filter is introduced after the phase discriminator to filter out the interfering items of the three-phase inverter. And then, the transfer function of proposed PLL structure is analyzed, and the asymptotic stability of the PLL at the equilibrium point is verified through the Jacobi matrix. The output performance of the PLL under static unbalanced and dynamic unbalanced conditions are verified on a simulation platform. Eventually, the adaptability of the PLL is further analyzed on an experimental platform. The outcomes demonstrate the proposed PLL possess good performance.