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This paper delves into the evolving landscape of Artificial Intelligence (AI) techniques within integrated circuit (K') design, spanning from design planning to implementation. We will focus on the capabilities of AI integration during the physical design stages, particularly in advanced nodes, because rapid growing design complexity and the shrinking of technology nodes have made physical design become incredibly challenging to achieve design closure and better power, performance, area, schedule (PPAS). Lastly, we will discuss the future challenges and opportunities in physical design optimization that could be resolved with the aid of AI.
Lee et al. (Mon,) studied this question.