Test and performance of the CMS ECAL barrel data conversion and digital processing ASIC for HL-LHC

Abstract In preparation for the high luminosity upgrade of the Large Hadron Collider, a new data conversion and digital processing ASIC, called LiTE-DTU, was designed. Implemented in a 65 nm CMOS technology, the LiTE-DTU features two 12-bit 160 MS s -1 successive approximation register time-interleaved ADCs, a data processing unit and enables efficient data transmission at 1.28 Gbps. The LiTE-DTU has undergone extensive testing in both laboratory and beam tests, demonstrating excellent performance in the pre-production version, showing the production readiness of the design. The results of this comprehensive series of tests will be presented.