In-Situ S/TEM DC biasing of p-GaN/AlGaN/GaN Heterostructure for E-Mode GaN HEMT Devices.

Abstract This work describes an in-situ electrical DC bias study of the E-mode GaN high electron mobility transistor (HEMT) device. A single transistor structure is biased and studied in real-time. The sample was made from an E-mode GaN HEMT device using Focused Ion Beam (FIB) milling and upright lift-off. The device lamella is subjected to forward gate bias to understand the device operation and physical changes under the bias. Active device area and micron level changes due to biasing were studied and identified as crucial factors affecting device reliability during continuous operation. Electric bias-induced physical changes are observed at the p-GaN layer and AlGaN interface on the p-GaN and GaN sides. Localized damage and defect formation, along with elemental diffusion, is observed. The formation of new defects over existing growth defects was seen in the p-GaN/AlGaN/GaN heterostructure. The study helped us identify the exact location of the failure, the region affected under bias, and the occurrence of physical changes due to the electrical bias on the in-situ device. Based on the study, gate breakdown failure and its location at the metal/p-GaN interface are understood to result from physical changes activated by electrical bias.