Parallel-type slew-rate enhancers (PSREs) improve the driving capability of operational transconductance amplifiers (OTAs) for large capacitive loads. While capacitive-boosting (CB) techniques enhance PSRE efficiency in fully-differential designs, their application to single-ended configurations—common in off-chip load driving—remains unexplored. This work identifies a critical limitation of standard CB in single-ended unity-gain buffers: severe slew-rate degradation due to large common-mode input swings. To overcome this, we propose a novel split CB (SCB) technique for single-ended PSREs that strategically divides the boosting capacitance. Simulated in a 0.18-μm CMOS process, the proposed method achieves a ×5.53 reduction in settling time compared to standard CB when driving a 1-nF load. With only 4 μA quiescent current under a 3.3-V supply, it attains a 1% settling time of 2.56 μs for 2.64-V steps, demonstrating robust performance across process-voltagetemperature variations. This technique enables low-power, high-speed interfaces for drivers of off-chip devices.
Gagliardi et al. (Thu,) studied this question.