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Hardware-efficient architecture of spiking neural networks based on sign-magnitude stochastic computing | Synapse
March 3, 2026
Hardware-efficient architecture of spiking neural networks based on sign-magnitude stochastic computing
TN
Thai Nguyen Trieu Nguyen
JS
Jun-Xiang Shi
VN
Vinh T. Nguyen
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Puntos clave
The architecture demonstrates significant reductions in energy consumption during computations for spiking neural networks.
It was shown that using sign-magnitude representation in stochastic computing improved performance metrics by 35%.
Evaluation involved assessments of various hardware platforms, indicating broad applicability across systems.
The findings may enable more scalable and energy-efficient designs in neural network implementations, optimizing hardware usage.
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Nguyen et al. (Tue,) studied this question.
synapsesocial.com/papers/69a7662bbadf0bb9e87dbfa8
https://doi.org/https://doi.org/10.1016/j.vlsi.2026.102662
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