Lossless image compression is pivotal for deep-space exploration. Considering the requirements of deep-space exploration for a high compression ratio and real-time processing, traditional image compression algorithms have garnered significant attention. However, existing algorithms struggle with real-time processing speed and compression degradation in high-noise regions, failing to meet the throughput demands of next-generation sensors. To address these challenges, this paper proposes a high-throughput and noise-resilient lossless image compression architecture, named HT-NRC, for deep-space CMOS cameras. First, to overcome the throughput bottleneck, we introduce a parallel processing method, which is built on index-based dispatch and Reorder mechanism. This is achieved by dynamically distributing pixel streams into parallel cores and utilizing a Reorder Buffer for sequence restoration. Second, to mitigate low compression efficiency in noisy backgrounds, we present a Heterogeneous Dual-Path Coding scheme. This system adaptively separates structural information for predictive coding and stochastic noise for raw packing with Bit-Plane Slicing (BPS) strategy. The proposed architecture was implemented on a Xilinx Virtex-7 FPGA (Xilinx, Inc., San Jose, CA, USA). Operating at 100 MHz, the system achieves a processing throughput of 414.7 Mpixel/s and a high average compression ratio under deep-space image datasets, while consuming an estimated total on-chip power of only 2.1 W. Experimental results show that our proposed method substantially outperforms existing baseline methods. Specifically, compared to the optimized serial JPEG-LS implementation processing one pixel per clock cycle, our parallel architecture achieves an approximately 314.7% increase in processing throughput.
Wu et al. (2026) studied this question.