Printed circuit board (PCB) defect detection faces significant challenges including dense micro-scale targets, similar background textures, and parameter redundancy in existing models. This study proposes MicroDETR, a lightweight real-time detection transformer optimized through three innovations. First, an EfficientBlock backbone employs depthwise separable convolution and channel shuffle mechanisms to enhance feature representation while compressing parameters. Second, an Enhanced Multi-Scale Feature Fusion Network (EMSFN) integrates multi-level features through bidirectional information flow. Third, a Multi-Level Feature Aggregation Module (MLFAM) reconstructs the AIFI component using grouped parallel computation to reduce complexity and enhance micro-target responses. Experimental results demonstrate that MicroDETR achieves 5.1% and 2.5% improvements in mAP@0.5 and mAP@0.5-0.95, respectively, with 3.3% and 0.8% enhancements in recall and precision. Simultaneously, the model reduces parameters by 15.21%, decreases computational complexity by 12.11%, and improves processing speed by 0.8 milliseconds. Comprehensive evaluation across seven defect categories reveals exceptional performance on small-scale targets (65% of dataset), with mAP@0.5 exceeding 77.5% for densely distributed defects. Robustness analysis demonstrates superior noise resistance, maintaining 78.1% mAP@0.5 under boundary noise (2.2% degradation vs. 5.6% for baseline) and achieving 69.8% mAP@0.5 with only 10% training data. Successful deployment on NVIDIA Jetson TX2 validates real-world applicability, delivering 18.9 FPS with 79.8% mAP@0.5 through TensorRT-FP16 optimization. Validation on chip surface defect and PKU-Market-PCB datasets confirms the effectiveness of the proposed approach in achieving optimal balance between accuracy and efficiency for industrial defect detection applications. The code and trained models are publicly available at https://github.com/yixing166/MicroDETR.
Hu et al. (Wed,) studied this question.
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