Massively Parallel In-Memory Computing via Frequency Multiplexing in Ferroelectric Capacitive Memory Arrays

As demand for massive parallelism grows, traditional computing architectures struggle with speed and efficiency in complex tasks. Overheating issues from frequent circuit charging and discharging further hinder performance. Ferroelectric capacitive memories (FCMs) provide a solution with their programmable capacitance and low power consumption. By blocking direct current (DC) and passing alternating current (AC), FCMs enable frequency domain computing with strong scalability. This work introduces an FCM based crossbar array design for massively parallel computing, particularly in neural network models. The design employs frequency multiplexing (FM) for simultaneous modulation and computation of analog signals through two interconnected crossbar arrays, achieving ultra-high throughput, which supports a new matrix-matrix multiplication (MMM) paradigm and high-precision multiply-accumulate (MAC) operations. A proposed single CMOS based demodulator circuit further enhances throughput by parallel demodulating FCM array outputs. A case study of a recognition application in one-shot inference examines the FM MMM operations. Circuit-level evaluations suggest that our proposed FCM array design improves energy efficiency by 5.94x over the memristor based FM design and the power consumption of our proposed mixer is just 0.27% of that of a ferroelectric mixer. Benchmarking of our FM approach shows a 3.24 × throughput improvement over the state-of-the-art FCM based computing-in-memory (CiM) design.