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Hardware heterogeneity is seen as a path forward for computers to deliver the energy and performance computing improvements needed over the next decade. In heterogeneous architectures, specialized hardware units accelerate complex tasks. A good example of this trend is the introduction of GPUs (Graphics Processing Units) for general purpose computing combined with multicore CPUs. FPGAs (Field Programmable Gate Arrays) are an alternative high-performance technology that offer bit-level parallel computing in contrast with the word-level parallelism deployed in GPUs and CPUs. In a typical configuration, the host CPU employs the FPGA accelerator to offload the work and then remains idle while in this work we aim at improving performance and obtaining energy proportional computing via simultaneous execution and adaptive voltage scaling on all available computing engines using a Xilinx Zynq MPSoC device as that target device.
Jose Nunez‐Yanez (Mon,) studied this question.