Los puntos clave no están disponibles para este artículo en este momento.
A 2Mbit CBRAM (conductive bridging random access memory) core has been developed utilizing a 90nm, VDD = 1.5V process technology. The presented design uses an 8F 2 (0.0648mum 2 ) 1T1CBJ (1-transistor/1-conductive bridging junction) cell and introduces a fast feedback regulated CBJ read voltage and a novel program charge control using dummy cell bleeder devices. Random read/write cycle times les50ns are demonstrated
Honigschmid et al. (Sun,) studied this question.