Resistive memory modeling: a generalized stochastic framework consolidating variability, parasitic, and temperature effects

Memristors’ enticing properties enable various unconventional computing paradigms, yet their inherent stochastic nature impedes circuit realization. Addressing this, a fully parameterizable stochastic RRAM model was implemented in Verilog-A, embodying intrinsic probabilistic time-evolution by combining memristor mathematics with Markov Processes and leveraging Chapman-Kolmogorov equations for transition rate integration. The proposed framework embodies the ensemble of reported conduction mechanisms in dielectric films in compact forms aiming at a universal implementation. A thorough behavioral and parametric analysis showcases the model’s adaptability to different devices and technologies. To showcase the framework’s potential, preliminary fitting results of fabricated SiN-based RRAM devices are presented.