ABSTRACT Wireless local area network (WLAN) communication technology is widely used in both civilian and commercial fields due to its high transmission rate, good compatibility, and support for simultaneous multidevice connections. WLAN receiver front‐end (RFE) with high dynamic range and high linearity helps improve information transmission distance and speed. Traditional WLAN RFEs are typically implemented using the CMOS process. However, compared with the GaAs pHEMT process, CMOS exhibits several disadvantages, including higher noise figures, lower output power, and increased insertion losses. To achieve better RF performance, this letter proposes a WLAN RFE structure based on the GaAs pHEMT process that eliminates the need for negative voltage. This design achieves better noise figure (NF) and dynamic range without increasing circuit complexity. Measured results show that the WLAN RFE chip using this topology not only supports the four operating modes required for WLAN but also exhibits a lower NF of 0. 7 dB and a higher gain of 16 dB in the RXLNA mode, along with a P1dB of 17 dBm, all within an area of only 1 × 1. 05 mm 2.
Zhang et al. (Fri,) studied this question.
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