Key points are not available for this paper at this time.
In this paper we explore a combination of above-and-subthreshold CMOS circuit techniques for the implementation of analog neuromorphic network processing. The implemented network embodies a blind signal separation algorithm performing an independent component analysis. It is essentially a continuous time recursive linear adaptive filter that uses a non-linear adaptation rule. Analog I/O interface, weight coefficients and adaptation blocks are all integrated on the chip. A test 2-neuron-2-synapse network as well as a small 5-neuron-20-synapse network were fabricated in a 2 micron n-well double-polysilicon, double-metal CMOS process. Circuit designs at the transistor level yield area efficient implementations for synapses and the adaptation blocks. We present experimental results from testing the systems with sinusoidal signals and noise and report on its performance as a blind separator of mixed speech signals.>
Cohen et al. (Sun,) studied this question.