PulseExploreJournal ClubDebatesTrendingResearchersJournals
Instagram
HomeExploreJournal ClubTrending
Synapse
⌘+K
Synapse
December 22, 200329 citations

512 Mb PROM with 8 layers of antifuse/diode cells

View Full Paper
MCMatthew CrowleyAAAli Al-ShammaDBD. Bosch

Structured PICO

I
Intervention
512 Mb PROM with 8 layers of antifuse/diode cells
O
Outcome
Read bandwidth, write bandwidth, and fault tolerance

Describes a 512 Mb PROM using a transistorless memory cell with an antifuse and diode, achieving high density through 8-layer stacking.

Abstract

A 3.3 V, 512 Mb PROM uses a transistorless memory cell containing an antifuse and diode. A bit area of 1.4F/sup 2/ including all overhead is achieved by stacking cells 8 high above the 0.25 /spl mu/m CMOS substrate. Read bandwidth is 1 MB/s and write bandwidth is 0.5 MB/s. A 72 b Hamming code provides fault tolerance.

Ask AI
Helpful
Bookmark
Share
View Full Paper

Cite This Study

Crowley et al. (2003) studied this question.

synapsesocial.com/papers/6a1b237cae4404f78096709chttps://doi.org/10.1109/isscc.2003.1234303
Ask AI
Helpful
Bookmark
Share
View Full Paper