Abstract Artificial Intelligence models pose serious challenges to intensive computing and high-bandwidth communication for conventional electronic circuit-based computing clusters. Silicon photonic technologies, due to their high speed, low latency, large bandwidth, and complementary metal-oxide-semiconductor compatibility, have been widely implemented for data transmission and actively explored as photonic neural networks in AI clusters. However, current silicon photonic integrated chips lack adaptability for multifunctional use and hardware-software systematic coordination, which is adverse to the development of photo-electronic AI clusters. Here, we develop a reconfigurable silicon photonic chip with 40 programmable unit cells integrating over 160 components, which, to the best of our knowledge, is the first to realize diverse functions for AI clusters with a chip, from computing acceleration and signal processing to network switching and secure encryption. Using a self-developed testing, compilation, and adjustment framework to the chip without in-chip monitoring photodetectors, we have demonstrated (1) 4 × 4 bi-direction unitary and 3 × 3 uni-direction non-unitary matrix multiplications, achieving a speed of over 1.92 TOPS with 6.22-bit precision and energy efficiency of 1.875 pJ MAC −1 , and neural networks for image recognition with a latency of 260 ps; (2) micro-ring modulator wavelength locking in the 5 to 32 Gb s −1 transmission systems; (3) 4 × 4 photonic channel switching with low to –44 dB inter-channel crosstalk; (4) silicon photonic physical unclonable functions. This optoelectronic processing system, incorporating the photonic chip and its software stack, paves the way for both advanced photonic system-on-chip design and the construction of photo-electronic AI clusters.
Zhu et al. (Wed,) studied this question.