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This paper presents a complete method that is used to balance dc link voltages in a cascaded H-Bridge (CHB) multilevel rectifier. Recently, such converters have been the subject of extensive research due to their suitability for high-power applications. One requirement in using a multilevel active rectifier at high levels of power is to limit the switching losses by reducing the switching frequency to a minimum. Another requirement for these converters is to ensure that individual dc link capacitor voltages for each cell of the converter are always balanced to ensure controllability and to limit stress on the converter cells. This paper presents a complete method in solving both of these problems using a selective-harmonic-elimination pulsewidth-modulation scheme. The scheme utilizes a simple controller to track each cell dc link capacitor voltage magnitude and accordingly biases the power flowing into each cell to ensure that the voltages across each cell capacitor converge. This is the case even when the loads attached to the individual cells are not balanced. The theory is supported by both simulated results from Saber and by experimental results from a seven-level CHB single-phase multilevel rectifier.
Watson et al. (Mon,) studied this question.