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1-MHz linewidth VCSEL enabled by monolithically integrated passive cavity for high-stability chip-scale atomic clocks | Synapse
March 3, 2026
Open Access
1-MHz linewidth VCSEL enabled by monolithically integrated passive cavity for high-stability chip-scale atomic clocks
ZT
Zhiting Tang
University of Electronic Science and Technology of China
CL
Chuanlin Li
University of Electronic Science and Technology of China
XZ
Xuhao Zhang
University of Electronic Science and Technology of China
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Key Points
Enhanced stability measured at 1 MHz linewidth enhances performance of atomic clocks.
Improvement allows for more accurate timekeeping in chip-scale technology.
Assessment using a monolithically integrated passive cavity framework ensures reliability and efficiency.
This innovation may enable broader applications for atomic clocks in various fields.
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Cite This Study
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Tang et al. (Thu,) studied this question.
synapsesocial.com/papers/69a75be3c6e9836116a24081
https://doi.org/https://doi.org/10.1038/s41377-026-02192-x