ABSTRACT Programmable photonic processors, based on cascaded Mach–Zehnder interferometer (MZI) meshes, serve as a reconfigurable hardware platform for high‐performance optical computing. However, inevitable fabrication‐induced process variations in large‐scale integration accumulate across MZI meshes and severely degrade weight mapping accuracy in optical convolutional neural networks (OCNNs), thereby limiting system performance and scalability for large‐scale deployment. Conventional trimming methods can partially mitigate phase errors but suffer from limited precision, high cost, process complexity, or poor CMOS compatibility, restricting their practical deployment. We propose a non‐volatile, CMOS‐compatible trimming technique integrating phase‐change material Sb 2 S 3 with ITO microheaters. By inducing crystallization of Sb 2 S 3 via Joule heating, the phase error between two MZI arms is precisely compensated. Through systematic optimization of Sb 2 S 3 crystallization kinetics and electrical pulse control, 64 trimming levels are achieved with a precision of (0.6 ± 0.1)%, resulting in a port imbalance of 0.10 dB for an MZI array splitter and an insertion loss of 0.42 dB per trimming unit. Trimming experiments on 10 MZI samples confirm the stability and repeatability of the trimming method. Such high‐precision phase trimming improves weight‐mapping accuracy in OCNNs, increasing inference accuracy from 87% to 98.2%. This approach provides a scalable strategy for the integration of programmable photonic processors.
Pang et al. (Tue,) studied this question.