Hardware accelerated convolutional neural networks for synthetic vision systems

Key Points

• This research aims to design a scalable hardware architecture for implementing large-scale convolutional neural networks suitable for synthetic vision systems.
• Developed a modular vision engine for real-time image processing.
• Conducted performance comparisons between software, FPGA, and ASIC implementations.
• Evaluated speed enhancements of custom hardware architectures.
• Custom hardware implementations showed significant speed improvements over software, with specific metrics reported.
• The FPGA design achieved optimized performance for real-time detection compared to other architectures.
• The ASIC implementation provided the fastest processing speeds for large-scale imagery.