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This paper addresses robust design of the active-power and dc-link control loops of power-synchronization control. Robustness is obtained by analytic gain selections, which give large enough stability margins. The proposed design allows robust stability irrespective of the grid strength and of the operating point, the latter with one exception. The proposed design is compared to design based on the principle virtual synchronous machine. Experiments show that the time-domain results correlate well with the frequency-domain results.
Harnefors et al. (2018) studied this question.