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Circuit partitioning plays a fundamental role in hierarchical layout systems. Identifying the strongly connected subcircuits, the clusters, of the logic can significantly reduce the delay of the circuit and the total interconnection length. Finding such a cluster partition however, is NP-complete. The authors propose a fast heuristic algorithm based on a simple, local criterion. They are able to prove that for highly structured circuits the clusters found by this algorithm correspond with high probability to the 'natural' clusters. An application to large scale real world circuits shows that by this method the number of nets cut is reduced by up to 46% compared to the standard mincut approach.>
Garbers et al. (Wed,) studied this question.