Constraint-Level QUBO Hardware Execution at the 5–8 Qubit Frontier: Resilience-Level Comparison on IBM Quantum Hardware for Reactor-Scale Fault Tree Subtrees

This work evaluates Constraint-Level QUBO (CL-QUBO) circuit execution on IBM Quantum hardware for 34 reactor-scale fault tree subtrees spanning 5–8 basic events, selected from the 776-member quantum-feasible candidate pool established in Paper 9 (Peters, 2026). Circuits were constructed using the CL-QUBO encoding and QAOA Alternating Operator Ansatz at depth p = 1, transpiled to both ibm_torino (133 qubits) and ibm_marrakesh (156 qubits), and executed under three IBM Runtime Sampler configurations (RL0, RL1, RL2) with identical bound parameters (β = 0.2, γ = 0.2) across all resilience levels. A total of six hardware jobs consumed 476 seconds (7.93 minutes) of quantum runtime across 8,192 shots per circuit. The results demonstrate that at this circuit scale, 10–16 logical qubits transpiling to 78–150 two-qubit gates at depths of 165–338, hardware output distributions are overwhelmingly noise-dominated by standard distributional metrics. Neither RL1 nor RL2 produces improvement; RL1 actively degrades output quality relative to RL0 on both backends. However, direct comparison of hardware top-probability outcomes against SCRAM-validated prime implicants from Paper 9 reveals substantial above-random minimal cut set (MCS) enrichment relative to the uniform-random baseline in the n = 8 groups (6.2× and 3.8× expected random rate in the top-200 outcomes), demonstrating that CL-QUBO circuits produce detectable MCS-correlated structure even in distributions that appear noise-dominated by aggregate metrics. These findings characterize the current observed performance ceiling for this CL-QUBO configuration on the tested IBM backends and provide both distributional and MCS-correctness baselines against which future hardware improvements can be measured.