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An ambipolar pentacene transistor with top-gold and top-calcium contacts has been realized by utilizing a parallactic shadow mask effect during vapor deposition. The pentacene deposited on top of a silicon dioxide gate insulator is doped by Ca at the pentacene/SiO2 interface in order to compensate electron traps. An equivalent circuit model based on a resistor-capacitor network has been developed to describe the basic electrical properties of the transistor. Shockley-like analytical expressions for the output and transfer characteristic, as well as an analytical expression for the potential and charge-carrier distribution in the channel, are derived under the assumption of a high electron-hole recombination probability. The model has been fitted to our experimental results and yields comparable mobilities for both holes and electrons in the order of 0.1cm2∕Vs. The increasing threshold voltages, with an increase in gate voltage, are discussed as an indication for trapped charge carriers within the insulator (SiO2).
Schmechel et al. (Sat,) studied this question.