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The ability to change states using voltage in ferroelectric tunnel junctions (FTJs) offers a route for lowering the switching energy of memories. Enhanced tunneling electroresistance in FTJ can be achieved by asymmetric electrodes or introducing metal-insulator transition interlayers. However, a fundamental understanding of the role of each interface in a FTJ is lacking and compatibility with integrated circuits has not been explored adequately. Here, we report an incisive study of FTJ performance with varying asymmetry of the electrode/ferroelectric interfaces. Surprisingly high TER (∼400%) can be achieved at BaTiO3 layer thicknesses down to two unit cells (∼0.8 nm). Further our results prove that band offsets at each interface in the FTJs control the TER ratio. It is found that the off state resistance (R(Off)) increases much more rapidly with the number of interfaces compared to the on state resistance (ROn). These results are promising for future low energy memories.
Li et al. (Fri,) studied this question.