A VLSI architecture for high-performance, low-cost, on-chip learning

The motivation for the X1 architecture described was to develop inexpensive commercial hardware suitable for solving large, real-world problems. Such an architecture must be systems oriented and flexible enough to execute any neural network algorithm and work cooperatively with existing hardware and software. The early application of neural networks must proceed in conjunction with existing technologies, both hardware and software. Using state-of-the-art technology and innovative architectural techniques, the author's architecture approaches the speed and cost of analog systems while retaining much of the flexibility of large, general-purpose parallel machines. The author has aimed at a particular set of applications and has made cost-performance tradeoffs accordingly. The goal is an architecture that could be considered a general-purpose microprocessor for neurocomputing