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In this paper we demonstrate excellent memory performances of a 90nm CMOS-friendly W 2 O 3 CBRAM cell integrated in a 1T1R configuration and withstanding the back-end of line thermal budget of 400°C. The cell exhibits low-power and highly controlled set and reset operations, allowing reversible multilevel programming controlled by both the set current and the reset voltage. Low-voltage (10 6 write endurance with a 2-decade memory window. State stability is assessed up to 125°C. Moreover, due to low slope of the voltage-log (time) relationship the cell also shows excellent voltage-disturb immunity assessed up to +/-0. 5V and extrapolated to 10 years.
Belmonte et al. (Wed,) studied this question.
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