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The basic logic elements of AND, OR and INVERTER gates as implemented in c.c.d. logic are described and experimentally evaluated. The AND and OR gates are incorporated in one simple structure using the mechanism of charge spillage over a d.c. control gate from a common input well. Design equations are presented for the floating-gate master-slave sensing structure which is the basis of the inverter and are shown to be in good agreement with practical results. The problems associated with the devices, namely speed of operation and chargetorage under the slave, are discussed in detail.
Montgomery et al. (Tue,) studied this question.