The proposed ultra-low power Analog Signal Processor IC provides efficient QRS feature extraction and bio-impedance measurement for implantable cardiac devices.
The accurate recognition of multiple intra-cardiac signals is becoming more and more important for Cardiac Resynchronization Therapy (CRT) and for the analysis of the intra-thoracic fluid status 1, 2. Robust and accurate Heart-Rate (HR) monitoring at the right/left ventricles and the right atrium is essential for an implantable cardiac pacemaker system (Fig. 16.9.1), and ultra-low power consumption is needed. In addition, an accurate motion sensor and thoracic impedance measurement can acquire valuable additional information in clinical research on the intra-cardiac rhythm analysis. As shown in Fig. 16.9.2, our proposed Analog Signal Processor (ASP) IC consists of 3 power-efficient intra-cardiac signal readout channels. Each channel is equipped with a low-power QRS feature extraction unit and an ECG processor in parallel. The ASP also provides an ultra-low-power readout circuit for an external accelerometer (RA). In addition, two quadrature bio-impedance readout channels are used together with a digitized sinusoidal current generator in order to implement an accurate and wide dynamic range bio-impedance measurement. The ASP improves the state of the art by integrating a power-efficient means of QRS feature extraction for detecting Ventricular Fibrillation (VF), and a wide dynamic range bio-impedance readout.
Kim et al. (Fri,) studied this question.
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