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New design techniques facilitate a high reliability 1T1C 8Mb ferroelectric random access memory with 0.71u 2 cell operating at 1.5V on a 130nm 5LM Cu process. Zero cancellation increases the cell interrogation voltage by using a nonswitching ferroelectric capacitor to remove charge from the bit line that compensates the linear charge from the cell capacitor. A micro-granularity redundancy approach preserves high repair probability for up to 128 single bit failures. Trim data is stored in 2T2C configuration rows for redundancy, reference, regulator and control logic adjustment
Eliason et al. (Wed,) studied this question.