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A microprocessor system is presented in which the supply voltage and clock frequency can be dynamically varied so that the system can deliver high throughput when required while significantly extending battery life during the low speed periods. The system consists of a dc-dc switching regulator, an ARM V4 microprocessor with a 16-kB cache, a bank of 64-kB SRAM ICs, and an I/O interface IC. The four custom chips were fabricated in a standard 0.6-/spl mu/m 3-metal CMOS process. The system can dynamically vary the supply voltage from 1.2 to 3.8 V in less than 70 /spl mu/s. This provides a throughput range of 6-85 MIPS with an energy consumption of 0.54-5.6 mW/MIP yielding an effective energy efficiency as high as 26200 MIPS/W.
Burd et al. (Wed,) studied this question.
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