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This paper describes IRSIM, an incremental switch-level simulator for MOS transistor circuits. In IRSIM, the circuit under simulation can be modified and then incrementally resimulated. This allows error correction and circuit operation verification to be performed in time proportional to the size of the modifications rather than the size of the entire circuit. To accomplish this incremental simulation, IRSIM maintains a history of circuit activity during simulation and only resimulates the sections of the circuit that deviate from their history. The program was tested on several corrections to errors that actually occurred in the design of a VLSI microprocessor. These errors were corrected and the circuit was incrementally resimulated 1.6 to 3500 times faster than simulating the entire circuit.
Salz et al. (Sun,) studied this question.
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