Numerical prediction of the junction-to-fluid thermal resistance of a 2-phase immersion-cooled IBM dual core POWER6 processor

The numerical model used in development of the CPU cold plates for the water-cooled IBM p575 supercomputer is used in this work to predict the junction-to-fluid performance capabilities of passive 2-phase immersion cooling for the same p575 chip module. Experimentally-determined boiling heat transfer coefficients for a porous copper boiling enhancement coating (BEC) were used as a convective boundary condition applied atop the lid in place of the cold plate and secondary thermal interface. The BEC produces 75% and 1500% increases, respectively, in the critical heat flux (CHF) and peak heat transfer coefficients relative to a smooth surface. Lid thicknesses, 3.75mmm =158W. A thickness of t=3.75mm eliminated regional dryout of the BEC and yielded the optimal sink-to-fluid thermal resistance based on the lid temperature over the centerline of the chip of R sf =0.073°C/W, a value consistent with previous measurements based on electric heaters similar in size to the P6 core. The resultant average junction-to-fluid thermal resistance was R jf =0.174°C/W, ~10% lower than the junction-to-water inlet resistance, R jw,i previously modeled for a single water-cooled cold plate used in the production p575. Immersion system level performance was estimated by assuming that 50% of the volume used for heat sinks in an air-cooled version of the p575 node was available for condensation. The analysis showed roughly equivalent performance to the water-cooled node if the same isolated rack water is used to condense the vapor. If facility water is instead used to condense the vapor directly and at the rack scale, pumps and much of the cooling hardware could be eliminated and the facility water temperature could be raised.