Design and Implementation of a Novel Multilevel DC–AC Inverter

In this paper, a novel multilevel dc-ac inverter is proposed. The proposed multilevel inverter generates seven-level ac output voltage with the appropriate gate signals' design. Also, the low-pass filter is used to reduce the total harmonic distortion of the sinusoidal output voltage. The switching losses and the voltage stress of power devices can be reduced in the proposed multilevel inverter. The operating principles of the proposed inverter and the voltage balancing method of input capacitors are discussed. Finally, a laboratory prototype multilevel inverter with 400-V input voltage and output 220 V rms /2 is implemented. The multilevel inverter is controlled with sinusoidal pulse-width modulation (SPWM) by TMS320LF2407 digital signal processor (DSP). Experimental results show that the maximum efficiency is 96.9% and the full load efficiency is 94.6%.