Technologies Toward Three-Dimensional Brain-Mimicking IC Architecture

Although device downscaling will soon reach the quantum limit, the speed and power are still the hard challenges for advanced ICs. To address these speed and power issues, we pioneered the three-dimensional (3D) IC in 2004. In contrast to few interconnects of package-level 3D IC, device-level high-mobility nMOS on VLSI backend, unipolar nMOS logic with CMOS-like ultra-low DC power, narrow distribution RRAM, and high-speed ferroelectric nMOS memory are the enabling technologies toward brain-mimicking IC architecture.