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Abstract Lead halide perovskite solar cells now show excellent efficiencies and encouraging levels of stability. Further improvements in performance require better control of the trap states which are considered to be associated with vacancies and defects at crystallite surfaces. Herein, a reflection on the ways in which these traps can be mitigated is presented by improving the quality of the perovskite layer and interfaces in fully assembled device configurations. In this review, the most recent design strategies reported in the literature, which have been explored to tune grain orientation, to passivate defects, and to improve charge‐carrier lifetimes, are presented. Specifically, the advances made with single‐cation, mixed‐cation and/or mixed‐halide, and 3D/2D bilayer‐based light absorbers are discussed. The interfacial, compositional, and band alignment engineering along with their consequent effects on the open‐circuit voltage, power conversion efficiency, and stability are a particular focus.
Akın et al. (Tue,) studied this question.