Challenges and recent prospectives of 3D heterogeneous integration

With the continuous reduction of chip feature size, the continuation of Moore's Law becomes increasingly difficult and heterogeneous integration has become one of the important orientations of electronic technology. Focusing on the issues including system integration and interconnection in submicron to 10 μm orders of magnitude, 3D heterogeneous integration formed by multiple chip connections on package substrates supported by active through-silicon vias breaks the scale barrier from micro-nano technology to system integration at the acceptable cost. 3D heterogeneous integration is gradually developing towards 3D stacking, multi-function integration and hybrid heterogeneous integration, which makes integrated products have the advantages of high integration, low power consumption, miniaturization and high reliability. This paper summarizes the development of 3D heterogeneous integration, the current researches as well as the fields and prospects of application.